Two of the sector's big themes - chiplet bridges and silicon photonics - collide in this grant. Intel's composite bridge wired chiplets electrically; Celestial AI's 2023 grant claims a bridge that wires them optically, sending data between dies as light.

The grant US11835777B2, "Optical multi-die interconnect bridge (OMIB)" (issued December 5, 2023; Celestial AI Inc.; CPC G02B 6/4295 optical-fiber/waveguide coupling, G02B 6/428, G02F 1/0157 optical modulation), claims an optical bridge for multi-die interconnect. The G02B 6 and G02F optical codes confirm this is photonic, not electrical.

“A package includes a bridging element (an OMIB), and first and second photonic paths, forming a bidirectional photonic path. The OMIB has first and second interconnect regions to connect with one or more dies.”— U.S. Patent No. 11,835,777 source

Why put optics in the bridge? The die-to-die link is exactly where bandwidth demand is highest and electrical signaling struggles most as data rates climb. Carrying it optically promises very high bandwidth at low energy per bit over the short hop between chiplets - applying the photonics advantage at the package level rather than the datacenter level.

The independent claim describes the structure precisely. The bridging element has first and second interconnect regions for electrical connection to one or more dies, plus two photonic paths running in opposite directions between those regions - one carrying an optical signal out, the other back - so the bridge forms a full bidirectional optical link. The clever part is how the bridge couples to the compute die: the claim splits the photonic transceiver in two. A first portion lives in a photonic integrated circuit (PIC) inside the bridge, while a second portion lives in an electronic integrated circuit (EIC) - the logic die itself - and the two are joined by an electrical interconnect “less than two millimeters in length.” Keeping that electrical hop under 2 mm is the whole point: electricity only has to travel a tiny distance from the die's edge to the modulator before the signal becomes light, so the long-haul portion of the link is optical and the lossy electrical portion is vanishingly short.

The dependent claims show where the photonic engineering concentrates. The first transceiver portion includes an optical modulator that imprints data onto the light in response to a signal from the EIC, and claim 4 names the modulator as an electro-absorption type fabricated from germanium, silicon, a germanium or silicon alloy, or a III-V material based on indium phosphide (InP) or gallium arsenide (GaAs) - the material menu of integrated photonics. The abstract adds that the bridge may include temperature compensation for the modulator, a real-world necessity because electro-absorption modulators drift with heat. Other claims route a third and fourth photonic path out to an optical interface, so the bridge handles both die-to-die light and light leaving the package toward a fiber.

The placement claims tie the optics to the compute floorplan. The EIC is described with a central region - holding memory, cache, a network-on-chip crossbar, a switch, or a routing mechanism - and the transceiver's die-side portion is required to sit in or within 2 mm of that central region (or within 2 mm of a compute element arranged around it). In other words, the patent insists the optical interface land near the data's source on the die, not at some distant pad, minimizing electrical travel before conversion. The bridging element can be embedded in the substrate so its top surface is coplanar with the substrate, letting the die abut directly onto it.

The challenge, and where the claim's scope sits, is integrating waveguides and modulators into a bridge that still mechanically and thermally couples the chiplets. You are asking a single small structure to do both an optical and a packaging job, which is precisely the hard, patentable part - and the temperature-compensation and sub-2-mm constraints in the claims show how tightly that co-design is specified.

The assignee tells you about the market. Celestial AI is a photonics-focused startup, and seeing a startup hold OMIB IP shows this corner of the thicket is contested by specialists, not only the giants. Optical packaging is open enough that focused players can stake meaningful claims.

It is worth noting what the claims do not require, because that scope is part of the IP. The bridge connects to “one or more dies” - the claim language does not even mandate two separate chiplets, so a single die abutting the bridge to reach an external fiber is covered as well as a true die-to-die hop. The transceiver split is similarly flexible: claim 10 only requires the first portion to include a modulator and/or a photodetector, so the bridge can be a transmitter, a receiver, or both, and claim 11 lets that same portion drive the additional outbound and inbound paths to the optical interface. Claim 13 describes the first interconnect region extending up to a top surface for an “abutted coupling” against the bottom of the die - the optical and electrical handoff happening face-to-face rather than through a long detour. Each of these is a degree of freedom the patent reserves, widening the wall it builds around package-level photonics.

For the reader, the synthesis is the point: the chiplet bridge and silicon photonics are converging. Celestial AI's 2023 grant is an early, granted claim on that convergence - a die-to-die bridge that moves photons, with the electrical hop held under 2 mm and the modulator placed near the die's data core, aimed squarely at the bandwidth ceiling that electrical bridges eventually hit.