Packaging is where the interesting problems have migrated, and this one is deceptively small: how do you let go of a chip? Place a die onto a wafer with a tool and it stays exactly where you put it only while the tool holds it. Release too early and it shifts. Bond it permanently while the tool is still attached and the tool is now part of your thermal and mechanical stack during the bond. Somewhere between those two failures is a handoff, and an application published on 23 July 2026 and assigned to Samsung Electronics Co., Ltd. is directed at that handoff specifically.

The record is US20260215351A1, titled Method of Bonding Wafer and Chip, naming Dongsik Shim as sole inventor. Its answer is a liquid.

A method may include: pre-bonding, by a liquid, a wafer to a chip, while the chip is attached to a jig; and detaching the jig after the pre-bonding, wherein the pre-bonding includes evaporating the liquid in a vacuum.— Method of Bonding Wafer and Chip, US20260215351A1

The mechanism is stated plainly in the dependent claims. Claim 8 recites that the pre-bonding comprises pre-bonding, via a surface tension of the liquid, the wafer to the chip. A liquid film between two flat surfaces resists being pulled apart — the same effect that makes two wet microscope slides difficult to separate. That force is enough to retain the chip against the wafer once the jig releases, and it requires no adhesive, no solder and no permanent material left behind, because the liquid is then evaporated in a vacuum. Claim 4 recites that the liquid comprises water; claim 3 recites that it comprises oxygen.

The second stage does the real bonding

Surface tension is a holding force, not a join. The second independent claim, claim 9, adds what comes next: post-bonding, by heat and pressure, the wafer to the chip after the pre-bonding. Claim 11 gives the temperature window as a range of 200 degrees C to 400 degrees C, and claim 10 gives the pressure as a range of 0.5 atm to 4 atm. Claim 12 states the purpose directly — the post-bonding comprises changing a bonding of the wafer and the chip, caused by the pre-bonding, into a covalent bonding.

That temperature band is the number worth sitting with. Two to four hundred degrees is low for a permanent bond and deliberately so; it is the regime where you can form a durable interface without exceeding the thermal budget of devices already fabricated on the wafer underneath. The recited pressure range is similarly modest, topping out at four atmospheres, which is compression rather than the high-force thermocompression associated with metal bonding. The pairing suggests an interface being coaxed into a covalent join rather than forced into one — consistent with claim 12's framing of the post-bond as a conversion of what the pre-bond already established.

What is being bonded to what

The claims are specific about the materials on each side, and this is where the application stops being a generic bonding method. Claims 2 and 13 recite that the chip comprises a group III-V semiconductor. Claims 7 and 17 add manufacturing a laser diode by processing the chip. Group III-V compounds are the materials that emit light efficiently, which silicon does not; laser diodes are built from them. So the chip in this method is a light source, and it is being attached to a wafer.

What the wafer carries is where the record requires care. Claim 5 recites that the wafer comprises a device, and claim 6 recites that the device comprises an optical waveguide or an antenna. Read through that chain, the waveguide sits on the wafer — a light source bonded onto a substrate carrying the structure that will route its output. But the third independent claim, claim 19, recites pre-bonding a wafer and a chip while the chip is attached to a jig, wherein the chip includes an optical waveguide or an antenna. There the waveguide is recited as part of the chip. The two vocabularies are inverted relative to one another, and the published record supports each only within its own claim chain. They should not be blended into a single description of the invention, and are not here.

Taken on the claim-5-and-6 reading, the process describes attaching a compound-semiconductor light emitter onto a wafer bearing passive optical structure, at temperatures compatible with prior processing, with no residual bonding material at the interface. The alternative recited use — an antenna rather than a waveguide — points the same method at high-frequency components, where a III-V die and a passive radiating structure face the same integration problem for the same reason.

The application sits in a drop where Samsung's other published records cluster heavily around joining and stacking: bonding chucks that deform to compensate scale error, paired substrate structures joined at bonding pads, a package of offset stacked chips with an overhanging die, a redistribution-structure package, and an interposer carrying chiplet dies alongside capacitor dies. Different problems, one preoccupation. The stack tells you the roadmap, and this week the stack is about getting dissimilar pieces to hold still against each other long enough to become one thing.

One standing caution applies. This is a published application, not a granted patent. The claims described above are the claims as filed and made public; they have no enforceable effect in this form and may narrow before any grant issues. The record also discloses no yield figure, no placement-accuracy figure and no throughput figure, so how well the liquid holds position in production is not something this document answers.