Hybrid bonding is a method of physically and electrically joining two semiconductor dies by fusing two different materials across their contact surfaces at the same time. Where the dies meet, the insulating dielectric on one die bonds directly to the dielectric on the other (a dielectric-to-dielectric bond), and the copper interconnect pads on one die bond directly to the copper pads on the other (a metal-to-metal bond). The defining feature is what is absent: there is no solder microbump between the dies. In conventional stacking, tiny solder bumps carry the electrical connection between dies, and the bumps' size sets how closely the connections can be packed. Hybrid bonding removes the bump, fusing copper to copper, so the connections can be placed far more densely and the electrical path between the stacked dies is shorter.

The cleanest way to pin down the technique is the granted claim language. Taiwan Semiconductor Manufacturing Company's U.S. Patent No. 11,735,576 B2, “Integrated circuit package and method,” granted August 22, 2023 with a priority date of February 12, 2021, describes the bonding sequence directly in its method.

"a method includes: bonding a back side of a first memory device to a front side of a second memory device with dielectric-to-dielectric bonds and with metal-to-metal bonds"— USPTO, U.S. Patent No. 11,735,576 B2 (TSMC), source

That one sentence captures the whole idea. Two bond types — dielectric-to-dielectric and metal-to-metal — are formed across the interface between the two dies, here described as memory devices, with the back side of one joined to the front side of the other. The claim then proceeds to form conductive bumps through a dielectric layer afterward, but the die-to-die join itself is the bumpless hybrid bond. This is the structural reason hybrid bonding is treated as an enabler of high-density 3D stacking: it is the interconnect that lets dies sit directly atop one another with copper fused to copper.

Why bumpless matters for stacked dies

The advantage of hybrid bonding is interconnect density and shorter vertical paths. A solder microbump has a minimum size and a minimum spacing; those set a floor on how many connections can run between two stacked dies and how far apart they must be. By fusing copper pad to copper pad with no solder in between, hybrid bonding drops that floor dramatically, allowing far more connections per unit area and bringing the two dies into more intimate electrical contact. For memory stacks in particular — where the goal is to move enormous amounts of data between vertically adjacent dies — the density of the die-to-die connection is a direct lever on how much bandwidth the stack can carry. The patent's framing around memory devices reflects exactly that application: stacking memory tightly enough, with enough connections, to feed bandwidth-hungry compute.

Hybrid bonding sits alongside interposers and chiplet integration as one of the core advanced-packaging techniques that have made packaging, rather than the transistor alone, a defining constraint on leading-edge systems. The transistor determines what one die can do; the bond determines how tightly many dies can be joined into a system. The TSMC method claim shows the bond being prosecuted as specific, ordered process steps — which is the difference between a marketing term and a defined manufacturing technique.

Why the process order is in the claim

It is worth dwelling on the fact that the patent claims a sequence, not just a structure, because the order is where the engineering difficulty lives. The claim describes bonding the back side of one memory device to the front side of another with both bond types, and then — “after the bonding” — forming conductive bumps through a dielectric layer. That ordering is not incidental. Hybrid bonding requires the two facing surfaces to be extraordinarily flat and clean, because copper pads must meet copper pads and dielectric must meet dielectric across the entire interface at once; any significant unevenness or contamination prevents the metal-to-metal bond from forming reliably. The dielectric surfaces are typically brought together first to establish the bond, and the copper, which can be recessed slightly, is then fused — often with a thermal step that expands the copper to close the gap. Claiming the steps in order captures that the technique is as much about surface preparation and sequence as about the final stacked structure. For a reader trying to distinguish hybrid bonding from older die-attach methods, the tell is exactly this: a microbump process tolerates surfaces that hybrid bonding cannot, because the solder bump bridges gaps the direct copper-to-copper bond will not. The granted claim's insistence on a particular order of operations is the patent record's way of describing a process whose whole advantage — density without bumps — depends on getting that order and those surfaces right.

What the record shows

The verifiable facts: hybrid bonding joins two dies by simultaneously forming dielectric-to-dielectric and metal-to-metal (copper-to-copper) bonds across their facing surfaces, eliminating solder microbumps. TSMC's granted U.S. Patent 11,735,576 B2 (“Integrated circuit package and method,” priority Feb. 12, 2021; granted Aug. 22, 2023) describes a method “bonding a back side of a first memory device to a front side of a second memory device with dielectric-to-dielectric bonds and with metal-to-metal bonds.” The bumpless, dual-material bond is what enables denser, shorter die-to-die connections, particularly for memory stacking. The patent establishes the technique as a prosecuted sequence of process steps; it does not, and cannot, speak to any product's volume or yield, which belong to the manufacturers' own disclosures. For the definition, the granted claim is the authority: two bond types, formed at once, no solder bump between the dies.